License Type:
Shareware
OS / Platform:
Windows 2000,
Windows 98,
Windows NT,
Windows XP,
Limitations:
14 days free trial
Site Language:
English
Editors Note
Ideal tool for FPGA and ASIC designers which provides the function of FPGA/ASIC verification and design environment. Contains the combined feature of standard graphical test vector generator and Verilog simulator. Feature to perform testing, like bottom-up testing, importing and exporting of Test loggers from HP logic analyzer, SPICE simulator, pattern generator etc., are made available.
Ideal tool for FPGA and ASIC designers which provides the function of FPGA/ASIC verification and design environment. Contains the combined feature of standard graphical test vector generator and Verilog simulator. Feature to perform testing, like bottom-up testing, importing and exporting of Test loggers from HP logic analyzer, SPICE simulator, pattern generator etc., are made available.
